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Tradeoff FPGA Cost of Sobel Implementation Using Approximate Designs
This dissertation proposes a scalable algorithm for tuning the tradeoff of space, energy, and quality for the implementation on Field-Programmable Gate Array (FPGA). First, an approximate design library including exact and ...
FPGA Acceleration on Multilayer Perceptron (MLP) Neural Network for Handwritten Digit Recognition
This dissertation presents a hardware implementation of a Multi-Layer Perceptron (MLP) network used for the purpose of low-latency, high-accuracy digit recognition. The accuracy of various network designs was compared in ...